1. Field of the Invention
This invention pertains generally to an optical transceiver for easy integration with silicon chips, and more particularly to an electro-optical modulator.
2. Description of Related Art
The rapid advancement of the state-of-the-art silicon integrated circuit (Si IC) technology continuously brings new challenges. One of the major technological challenges facing the industry today is high data rate (or for analog applications, high bandwidth) communication between chips. As the data rate increases to above Gbps, the ability of maintaining the data integrity using electrical interconnects becomes a very challenging issue.
The majority of interconnect systems can be divided into two large categories: those that are dominated by LC delays and those that are dominated by RC delays. The differentiation is whether the impedance from the inductance of interconnects dominates over the resistance. Because the former increases with the bit-rate of the signal, there is a crossover frequency at which a RC system becomes a LC one. It is well known that high speed interconnects are subject to the trade off between distance and bit rate. For a discernable signal at the receiving end, the longer the wires the lower the bit rate they can carry. Although the physics governing the signal delay in a LC system is fundamentally different from that for a RC system, the ultimate bit-rate limits appear to have a nearly identical form:
  B  ≈            B      0        ⁢          A              l        2            where A and I represent the cross-section area and the length of the interconnect, respectively, and the constant B0 is on the order of 1015 bps for optimized chip-to-chip interconnects. In other words, it is the aspect ratio, instead of the length, of interconnects that dictates the maximum achievable bit-rate. For typical interconnect length of 2 cm and use a skin depth limited wire diameter of 10 μm, the maximum bit-rate is lower than 1 GHz. According to the International Technology Roadmap for Semiconductors (ITRS), the off-chip speed will be around 10 GHz with typical interconnect length of 2 cm by year 2010. Even after factoring in the possibility of using larger but practical diameter wires, electrical interconnects post a severe limit in this regard. Optical interconnects, on the other hand, are not subject to this set of limiting physics. As a result, optical interconnects can out perform the electrical counterpart by multiple orders of magnitude. For example, a sophisticated optical system can handle the transmission of 160 Gbps over 232 km of optical fiber. It is quite obvious that optical is the way of the future of chip-to-chip interconnects.
Unfortunately, the various optical interconnects suffer from higher than ideal “overhead”. The “overhead” includes added power consumption and the associated heat dissipation if an on-chip laser is used, the complexity of added circuit elements to drive light sources, and the need for the integration of compound semiconductor materials on Si substrates. The high “overhead” translates directly into cost in production. Additional problems that are inherent to high data rate communications include the latency and skew in propagation delay.
Optical chip-to-chip interconnects have been contemplated. The demand comes from the need to maintain signal integrity while allowing for sufficient information flow to fully utilize the power provided by the increasingly dense CMOS.
The various approaches can be roughly divided into two large families: those employ active light emitters on Si, and those that rely on passive modulators. On the detector side, special measures are needed if the popular 1.3-1.5 μm wavelength is used. SiGe photodetectors have been intensively studied for this reason.
In recent years, it has become evident that for optical chip-to-chip interconnects to actually benefit IC industry, reducing the overhead associated with incorporating and operating the optical elements is of primary importance. In that regard, power consumption is a significant factor because high performance Si chips are already operating at near 100° C. with a cooling fan. Because the thermal management of IC alone is so challenging, any notion of adding a heat-generating device to is a hard sell.
A transmitter, in many senses, is a more challenging device to incorporate into Si than is the receiver. Several demonstrations of compound semiconductor lasers attached to Si chips via either wafer bonding or by flip-chip bonding have been made in the past few years. These approaches all face the severe challenge of the “overhead” issue mentioned above. In addition to the large thermal load associated with lasers, there is the need for high-speed driver circuits that are capable of operating at high frequencies while delivering sizeable current drive. Such simultaneous requirement makes the driver circuit itself the most challenging circuit element of any technology generation despite of the fact that it is functionally a support element to the processors.
With regard to the wavelength of the light, the customary choice of IR makes it difficult to obtain detectors with large enough bandwidth. This comes as a direct consequence of the large absorption length of silicon at these wavelengths. A fast detector can only be obtained at a severe sacrifice of the detectivity.
The above drawbacks generally summarize the reasons why the active approach to optical interconnect has not yet shown to be successful. On the other hand, the effort based on passive devices is affected by available modulators. Conventional modulators based on electro-optical materials such as LiNbO (see R. G. Batchko, M. M. Fejer, and L. Erman, Opt. Lett., 24, 1293 (1999)), SrBaNbO (see O. Kwon, O. Eknoyan, H. F. Taylor and R. R. Neurgaonkar, Electron. Lett., 35, 219 (1999)), and more recently polymeric materials (see D. G. Sun and R. T. Chen, Appl. Phys. Lett., 72, 3139 (1998)), have serious limitations.
For LiNbO and SrBaNbO modulators, there is an inherent trade-off between the modulator length (L) and the applied voltage for 180-phase shift (Vπ). Typical value of Vπ·L ranges from a few volts-cm to 0.25 V-cm with a modulation depth of 95%-99%. As a result, the modulators require either a waveguided structure of centimeter length, or a modulation voltage much higher than the typical supply voltage of approximately 1 volt on-chip. The waveguide geometry of centimeter lengths makes them incompatible with dense 2-dimensional modulator arrays as may be required by future Si technology. Most of these features are also applicable to polymer modulators. The weak electro-optical coefficient of the currently known polymer materials leads to a much higher Vπ·L value. Another issue with conventional modulators is the need for high voltage poling after the film is deposited (typically by sputtering) onto the substrate. Such high voltage process may subject the underlying Si circuit to electrostatic damage.
III-V quantum-well modulators based on quantum-confined Stark effect (e.g. those shown in D. A. B. Miller, D. S. Chemla, T. C. Damen, A. C. Gossard, W. Wiegmann, T. H. Wood, and C. A. Burrus, Phys. Rev. Lett., 53, 2173 (1984)) have so far been the devices most extensively used in demonstrating dense optical interconnects between chips. But the technology of integration of III-V devices with silicon is always difficult and costly. Unfortunately, this family of structures requires hetero-epitaxial integration of compound semiconductors with Si, i.e. the entire vertical cavity will have to be epitaxial on Si. Such a structure is prohibited by the tremendous strain energy in that it inevitably leads to dislocation. Probably the most feasible approach of realizing such a structure is through bonding of the vertical cavity together with the electro-absorption layer onto Si substrates. Such an approach is incompatible with state-of-the-art CMOS and is yet to be proven as a manufacturable technology.
Therefore, it would be desirable to enhance the functionality of Si CMOS ICs with a high bandwidth optical chip-to-chip interconnect.
It would also be desirable to provide a modulator which can be easily fabricated on variable substrate and be compatible with current CMOS processing
It would further be desirable to provide a modulator which can be incorporated into the backend processing of conventional Si CMOS.